Re: [PATCH 2/5] perf, x86: Basic Haswell PMU support v4

[Ingo Molnar]

* Andi Kleen <andi@xxxxxxxxxxxxxx> wrote:

> +static int hsw_hw_config(struct perf_event *event)
> +{
> +	int ret = intel_pmu_hw_config(event);
> +
> +	if (ret)
> +		return ret;
> +	if (!boot_cpu_has(X86_FEATURE_RTM) && !boot_cpu_has(X86_FEATURE_HLE))
> +		return 0;
> +	event->hw.config |= event->attr.config & (HSW_INTX|HSW_INTX_CHECKPOINTED);
> +
> +	/*
> +	 * INTX/INTX-CP do not play well with PEBS or ANY thread mode.
> +	 */
> +	if ((event->hw.config & (HSW_INTX|HSW_INTX_CHECKPOINTED)) &&
> +	     ((event->hw.config & ARCH_PERFMON_EVENTSEL_ANY) ||
> +	      event->attr.precise_ip > 0))
> +		return -EOPNOTSUPP;

Please explain it more verbosely in the comment what 'do not 
play well' means and why it necessiates a -EOPNOTSUPP reply.

Thanks,

	Ingo
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