Re: about PENTIUM4 cache line

[David B. Stevens]

Dave,

Thanks that explains it.

The layout as well as the size needs to be taken into account.

Cheers,
  Dave




Dave Jones wrote:
> On Sun, Aug 17, 2003 at 04:36:51PM -0400, David B. Stevens wrote:
>  > What's even more interesting is the following:
>
> why ?
>
>  > tux:/usr/src/linux-2.6.0-test3 # grep -r "CONFIG_X86_L1_CACHE_SHIFT" *
>  > arch/i386/defconfig:CONFIG_X86_L1_CACHE_SHIFT=7
>  > arch/x86_64/defconfig:CONFIG_X86_L1_CACHE_SHIFT=6
>
> correct default values for P4 and Hammer respectively.
>
>  > include/asm-x86_64/cache.h:#define L1_CACHE_SHIFT 
>  > (CONFIG_X86_L1_CACHE_SHIFT)
>
> Looks sane.
>
>  > include/linux/autoconf.h:#define CONFIG_X86_L1_CACHE_SHIFT 5
>
> compile-time generated from .config
>
>  > include/asm-i386/cache.h:#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
>  > include/asm/cache.h:#define L1_CACHE_SHIFT      (CONFIG_X86_L1_CACHE_SHIFT)
>
> looks sane
>
>  > include/config/x86/l1/cache/shift.h:#define CONFIG_X86_L1_CACHE_SHIFT 5
>
> compile time generated from .config.
>
> 		Dave


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