Re: about PENTIUM4 cache line

[Dave Jones]

On Sun, Aug 17, 2003 at 09:25:35PM +0100, Jamie Lokier wrote:
 > michaelc wrote:
 > >      I read the Intel IA-32 developer's manual recently, and I found
 > >  the cache lines for L1 and L2 caches in Pentium4 are 64 bytes
 > >  wide, but the thing make me confused is that the default value
 > >  CONFIG_X86_L1_CACHE_SHIFT option in 2.4.x kernel is 7, why it's
 > >  not 6?   Any expanation about this would be appreciated!
 > 
 > I don't recall seeing an answer to this.
 > Was there one?

ISTR it was something to do with how the P4 cachelines are laid out.
Something like 2 sectors of 64 byte lines.

		Dave

-- 
 Dave Jones     http://www.codemonkey.org.uk
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