Jes Sorensen writes:
> I haven't looked at the ohci driver at all, however doesn't it return
> anything but the dma address? No index, no offset, no nothing? If
> thats the case, someone really needs to go visit the designers with a
> large bat ;-(
The OHCI hardware works with linked lists of transfer descriptors,
using bus addresses for the pointers of course. When a transfer
descriptor is completed, it gets linked onto a done-list by the
hardware (on to the front of the list, so you get the completed
descriptors in reverse order).
There is no way to predict the completion order in general because you
can have transfers in progress to several different devices, and to
several endpoints on each device, at the same time, which can each
supply or accept data at different rates.
I don't think the OHCI designers considered the possibility that it
might be less than straightforward for the CPU to access some memory
given its bus address. And I would have a hard time arguing against
someone who claimed that a platform where that was difficult was
just terminally broken. :)
Paul.
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This archive was generated by hypermail 2b29 : Sun Oct 07 2001 - 21:00:43 EST