> > The mb() macro does a memory locked operation to force ordering. If that
> > doesn't do the PCI flush, then that was a mis-understanding on my part
>
> It will force ordering on x86 - x86 pci ordering should be guaranteed
> anyway in theory (unless people play with mtrr settings).
The PCI theory is called specifications and given the importance of PCI
nowadays you should read them carefully. Even if host bridges may flush
posted write buffers in some situations that are not required by PCI
specs, how do you want that a full PCI bus hierarchy would have buffers
flushed everywhere, since as you perhaps know, there is no side-band
signals with PCI.
> The m68k/ppc folks are now starting to add io synchronization stuff portably
> (no files full of eieio() even if its funny) with
>
> iobarrier_r()
> iobarrier_w()
> iobarrier_rw()
Naming something the same does not mean that it is portable. In my
opinion, most IO macros and functions in the kernel are not guaranteed to
have same effect for all architecture.
For PCI it is the PCI memory read that flushes posted writes. Any PCI
compliant implementation must ensure that and driver needs of ordering
must rely of this rule and nothing else.
> which are nops on a normal PC.
Your normal PC is broken, in my opinion, or just different from mine. :-)
Gerard.
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