It will force ordering on x86 - x86 pci ordering should be guaranteed
anyway in theory (unless people play with mtrr settings).
The m68k/ppc folks are now starting to add io synchronization stuff portably
(no files full of eieio() even if its funny) with
iobarrier_r()
iobarrier_w()
iobarrier_rw()
which are nops on a normal PC.
Alan
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