It should be -- that's what it's for. It's atomic on Alpha, m68k, ARM,
PPC and MIPS by my reading of the code. I don't really understand Sparc
assembler but it looks to me like it's atomic there too.
There are three different ways you can implement the atomic operation, all
with the same net result. Either you can use atomic test-and-set instructions
that the CPU provides (like m68k does), or you can use load-locked/
store-conditional sequences and a loop (eg Alpha/PPC/MIPS). Finally, for UP
only, you can disable interrupts to ensure atomicity (eg ARM).
Pavel, which port were you thinking of when you said it wasn't atomic?
p.
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