Re: TritonII IDE interface not PCI compliant?
Jochen Karrer (karrer@wpfd25.physik.uni-wuerzburg.de)
Tue, 17 Jun 1997 19:06:06 +0200 (MET DST)
Hi,
> I have a board in my computer that requires about 6Mb per second
> throughput on the PCI bus. That's not nearly enough to saturate
> the bus right? Anyway, that board has a buffer for 128 bytes.
> That is enough for 20 microseconds of data, but it will only request
> the bus when the buffer is about half full. Thus, it needs the bus
> within a span of 10 microseconds. If my calculations are correct,
> a latency of 32 cycles means about one microsecond.
>
> With two or three devices active on the bus I'd expect a max latency
> around a few microseconds. However my board reports that it gets
> locked out for long enough (10 us) that it gets a buffer overrun.
>
> This is my IDE interface according to /proc/pci:
>
> Bus 0, device 1, function 1:
> IDE interface: Intel 82371SB Natoma/Triton II PIIX3 (rev 0).
> Medium devsel. Fast back-to-back capable. Master Capable.
> Latency=32. I/O at 0xe800.
>
> Whenever I do disk access (dd if=/dev/hda of=/dev/null works nicely),
> I get tons of overruns from the other board.
I had a similar problem with 430FX Chipset and a PCI-Framegrabber.
I found that when PCI-Streaming is enabled every Burst Transfer of
a PCI-Master was stopped after one data phase.
( Don't ask me what PCI-Streaming is,
I found nothing about it in the intel doc.) This limited the
total PCI-Transfer speed to 6.5 MB/s. Maybe you didn't notice this because
your device only needs 6 MB/s. But when you start additional devices on
the bus you run in problems.
Unfortunately my Framegrabber works with 430HX and Streaming enabled, so it
might be that this is not the solution of your problem.
Jochen
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