Re: [PATCH v1.1 1/2] x86/sev: Use per-CPU PSC structure in prep for unaccepted memory support

[Tom Lendacky]

On 8/3/22 13:17, Dave Hansen wrote:
> On 8/3/22 11:11, Tom Lendacky wrote:
> > +	/*
> > +	 * Use the MSR protocol when either:
> > +	 *   - executing in an NMI to avoid any possibility of a deadlock
> > +	 *   - per-CPU GHCBs are not yet registered, since __vmgexit_psc()
> > +	 *     uses the per-CPU GHCB.
> > +	 */
> > +	if (in_nmi() || !ghcb_percpu_ready)
> > +		return early_set_pages_state(__pa(vaddr), npages, op);
> > +
> > +	spin_lock_irqsave(&psc_desc_lock, flags);
>
> Would it be simpler to just do a spin_trylock_irqsave()?  You fall back
> to early_set_pages_state() whenever you can't acquire the lock.

I was looking at that and can definitely go that route if this approach is 
preferred.

Thanks,
Tom

> That avoids even having to know what the situations are where you
> _might_ recurse.  If it recurses, the trylock will just naturally fail.
>   You simply can't have bugs where the "(in_nmi() || !ghcb_percpu_ready)"
> conditional was wrong.