RE: [PATCH V14 00/15] irqchip: Add LoongArch-related irqchip drivers

[Moore, Robert]

We can't take any patches that are unreleased in the ACPI specification (legal reasons). Hopefully this will happen this month.

-----Original Message-----
From: Marc Zyngier <maz@xxxxxxxxxx> 
Sent: Thursday, July 07, 2022 5:52 AM
To: Jianmin Lv <lvjianmin@xxxxxxxxxxx>; Rafael J Wysocki <rafael@xxxxxxxxxx>; Moore, Robert <robert.moore@xxxxxxxxx>
Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx; Hanjun Guo <guohanjun@xxxxxxxxxx>; Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>; Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>; Huacai Chen <chenhuacai@xxxxxxxxxxx>
Subject: Re: [PATCH V14 00/15] irqchip: Add LoongArch-related irqchip drivers

+ Rafael, Robert

On Sun, 03 Jul 2022 09:45:17 +0100,
Jianmin Lv <lvjianmin@xxxxxxxxxxx> wrote:
> 
> LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V.
> LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit 
> version (LA32S) and a 64-bit version (LA64). LoongArch use ACPI as its 
> boot protocol LoongArch-specific interrupt controllers (similar to 
> APIC) are already added in the ACPI Specification 6.5(which may be 
> published in early June this year and the board is reviewing the draft).

Can the ACPI/ACPICA maintainers eyeball patch #1 in this series[1]? It adds some new, yet unpublished ACPI MADT updates, and I need an Ack on that before considering taking this series.

Patches 2 and 3 could also do with an Ack from the ACPI maintainers (though Hanjun did review an earlier version).

Thanks,
	M.

[1] https://lore.kernel.org/r/1656837932-18257-2-git-send-email-lvjianmin@xxxxxxxxxxx

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