Re: [PATCH v4 04/13] media: rc: sunxi: Add RXSTA bits definition

From: Maxime Ripard
Date: Wed Jun 05 2019 - 05:55:45 EST


On Tue, Jun 04, 2019 at 06:29:50PM +0200, Clément Péron wrote:
> We are using RXINT bits definition when looking at RXSTA register.
>
> These bits are equal but it's not really proper.
>
> Introduce the RXSTA bits and use them to have coherency.
>
> Signed-off-by: Clément Péron <peron.clem@xxxxxxxxx>
> ---
> drivers/media/rc/sunxi-cir.c | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
> index 0504ebfc831f..572bd2257d35 100644
> --- a/drivers/media/rc/sunxi-cir.c
> +++ b/drivers/media/rc/sunxi-cir.c
> @@ -48,11 +48,11 @@
>
> /* Rx Interrupt Enable */
> #define SUNXI_IR_RXINT_REG 0x2C
> -/* Rx FIFO Overflow */
> +/* Rx FIFO Overflow Interrupt Enable */
> #define REG_RXINT_ROI_EN BIT(0)
> -/* Rx Packet End */
> +/* Rx Packet End Interrupt Enable */
> #define REG_RXINT_RPEI_EN BIT(1)
> -/* Rx FIFO Data Available */
> +/* Rx FIFO Data Available Interrupt Enable */
> #define REG_RXINT_RAI_EN BIT(4)
>
> /* Rx FIFO available byte level */
> @@ -60,6 +60,12 @@
>
> /* Rx Interrupt Status */
> #define SUNXI_IR_RXSTA_REG 0x30
> +/* Rx FIFO Overflow */
> +#define REG_RXSTA_ROI BIT(0)
> +/* Rx Packet End */
> +#define REG_RXSTA_RPE BIT(1)
> +/* Rx FIFO Data Available */
> +#define REG_RXSTA_RA BIT(4)

I'm fine with it on principle, but if the consistency needs to be
maintained then we could just reuse the above defines

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com