Re: [PATCH 8/8] ARM: dts: aspeed: Clean up UART nodes

[Andrew Jeffery]

On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:
> Â- Shorten size of reg property so it covers only the implemented
> Âregisters
>Â
> Â- Add VUART compatible
>Â
> Â- Move stray uart1 in g5 definition
>Â
> Â- Remove outdated current-speed property. Different bootloaders use
> Âdifferent speeds, so this is no longer helpful
>Â
> Signed-off-by: Joel Stanley <joel@xxxxxxxxx>
> ---
> Âarch/arm/boot/dts/aspeed-g4.dtsi | 17 +++++++++--------
> Âarch/arm/boot/dts/aspeed-g5.dtsi | 36 ++++++++++++++++++------------------
> Â2 files changed, 27 insertions(+), 26 deletions(-)
>Â
> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
> index 191c33d18122..7a4a53666d70 100644
> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
> @@ -27,6 +27,7 @@
> Â		serial2 = &uart3;
> Â		serial3 = &uart4;
> Â		serial4 = &uart5;
> +		serial5 = &vuart;
> Â	};
> Â
> Â	cpus {
> @@ -199,7 +200,7 @@
> Â
> Â			uart1: serial@1e783000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e783000 0x1000>;
> +				reg = <0x1e783000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <9>;
> Â				clocks = <&clk_uart>;
> @@ -209,7 +210,7 @@
> Â
> Â			uart2: serial@1e78d000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e78d000 0x1000>;
> +				reg = <0x1e78d000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <32>;
> Â				clocks = <&clk_uart>;
> @@ -219,7 +220,7 @@
> Â
> Â			uart3: serial@1e78e000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e78e000 0x1000>;
> +				reg = <0x1e78e000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <33>;
> Â				clocks = <&clk_uart>;
> @@ -229,7 +230,7 @@
> Â
> Â			uart4: serial@1e78f000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e78f000 0x1000>;
> +				reg = <0x1e78f000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <34>;
> Â				clocks = <&clk_uart>;
> @@ -239,7 +240,7 @@
> Â
> Â			uart5: serial@1e784000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e784000 0x1000>;
> +				reg = <0x1e784000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <10>;
> Â				clocks = <&clk_uart>;
> @@ -248,9 +249,9 @@
> Â				status = "disabled";
> Â			};
> Â
> -			uart6: serial@1e787000 {
> -				compatible = "ns16550a";
> -				reg = <0x1e787000 0x1000>;
> +			vuart: vuart@1e787000 {

Bit of a nit, but arguably this should be `vuart: serial@...`?

> +				compatible = "aspeed,ast2400-vuart";
> +				reg = <0x1e787000 0x40>;
> Â				reg-shift = <2>;
> Â				interrupts = <10>;
> Â				clocks = <&clk_uart>;
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> index 251fc9f4637e..0b793305120a 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -27,6 +27,7 @@
> Â		serial2 = &uart3;
> Â		serial3 = &uart4;
> Â		serial4 = &uart5;
> +		serial5 = &vuart;
> Â	};
> Â
> Â	cpus {
> @@ -247,16 +248,6 @@
> Â				status = "disabled";
> Â			};
> Â
> -			uart1: serial@1e783000 {
> -				compatible = "ns16550a";
> -				reg = <0x1e783000 0x1000>;
> -				reg-shift = <2>;
> -				interrupts = <9>;
> -				clocks = <&clk_uart>;
> -				no-loopback-test;
> -				status = "disabled";
> -			};
> -
> Â			lpc: lpc@1e789000 {
> Â				compatible = "aspeed,ast2500-lpc", "simple-mfd";
> Â				reg = <0x1e789000 0x1000>;
> @@ -287,9 +278,19 @@
> Â				};
> Â			};
> Â
> +			uart1: serial@1e783000 {

Earlier in the series you had a patch moving the ADC node to be in
address-order with respect to the rest of the nodes but this change puts uart1
out of address-order. As it turns out the uarts blocks are sprayed around in
the address-space: uart1 and uart5 are together, the vuart is elsewhere, then
uarts 2-4 are lumped together in another spot. I think it makes sense to
consolidate them, but it is inconsistent. Thoughts?

> +				compatible = "ns16550a";
> +				reg = <0x1e783000 0x20>;
> +				reg-shift = <2>;
> +				interrupts = <9>;
> +				clocks = <&clk_uart>;
> +				no-loopback-test;
> +				status = "disabled";
> +			};
> +
> Â			uart2: serial@1e78d000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e78d000 0x1000>;
> +				reg = <0x1e78d000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <32>;
> Â				clocks = <&clk_uart>;
> @@ -299,7 +300,7 @@
> Â
> Â			uart3: serial@1e78e000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e78e000 0x1000>;
> +				reg = <0x1e78e000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <33>;
> Â				clocks = <&clk_uart>;
> @@ -309,7 +310,7 @@
> Â
> Â			uart4: serial@1e78f000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e78f000 0x1000>;
> +				reg = <0x1e78f000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <34>;
> Â				clocks = <&clk_uart>;
> @@ -319,18 +320,17 @@
> Â
> Â			uart5: serial@1e784000 {
> Â				compatible = "ns16550a";
> -				reg = <0x1e784000 0x1000>;
> +				reg = <0x1e784000 0x20>;
> Â				reg-shift = <2>;
> Â				interrupts = <10>;
> Â				clocks = <&clk_uart>;
> -				current-speed = <38400>;
> Â				no-loopback-test;
> Â				status = "disabled";
> Â			};
> Â
> -			uart6: serial@1e787000 {
> -				compatible = "ns16550a";
> -				reg = <0x1e787000 0x1000>;
> +			vuart: vuart@1e787000 {

See serial@ comment above.

Cheers,

Andrew

> +				compatible = "aspeed,ast2500-vuart";
> +				reg = <0x1e787000 0x40>;
> Â				reg-shift = <2>;
> Â				interrupts = <10>;
> Â				clocks = <&clk_uart>;

Attachment: signature.asc
Description: This is a digitally signed message part