On 09/14/2013 01:08 AM, boris brezillon wrote:Actually it does: this patch removes the debounce time setting option fromHello Stephen,...
Le 14/09/2013 00:40, Stephen Warren a écrit :On 09/13/2013 01:53 AM, Boris BREZILLON wrote:AT91 SoCs do not support per pin debounce time configuration.
Instead you have to configure a debounce time which will be used for all
pins of a given bank (PIOA, PIOB, ...).
...Required properties for pin configuration node:...-DEBOUNCE_VAL (0x3fff << 17): debounce val.This change would break the DT ABI since it removes a feature that's
already present.
Each state has a different pin configuration node, and hence can specifyI suppose it's still up to the Atmel maintainers to decide whether thisWhat about the last point in my list: "reconfigure debounce after
is appropriate, or whether the impact to out-of-tree DT files would be
problematic.
Assuming the DT ABI can be broken, I think I'd prefer to do so, rather
than take "non-alt" patch 4/4, since a per-pin DEBOUNCE_VAL clearly
doesn't correctly model the HW, assuming the patch description is
correct. I don't think arguments re: the generic pinconf debounce
property hold; if the Linux-specific/internal generic property doesn't
apply, the DT binding should not be bent to adjust to it, but should
rather still represent the HW itself.
startup" ?
Here is an example that may be problematic:
Let's say you have one device using multiple configuration of pins
("default", "xxx", "yyy").
The "default" config needs a particular debounce time on a given pin and
the "xxx" and "yyy"
configs need different debounce time on the same pin.
How would you solve this with this patch approach ?
a different debounce value. This patch has no impact on that (it just
changes whether the state-specific node specifies the debounce value in
a single standalone property, or encodes it into each entry in the pins
property, all within the same node).