[PATCH 1/2] x86/tlb_flushall_shift: add Ivybridge EP CPU support

[Alex Shi]

Tested with munmap.c on Ivybridge EP 2S machine, the best shift value is
2, that means when the tlb flush entries less than 64, single invlpg has
performance benefit on this machine.
The testcase come from: https://lkml.org/lkml/2012/5/17/59
Results show it has about 5% to 30% performance increase.

Signed-off-by: Alex Shi <alex.shi@xxxxxxxxx>
---
 arch/x86/kernel/cpu/intel.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index ec72995..9a4bc51 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -629,6 +629,9 @@ static void intel_tlb_flushall_shift_set(struct cpuinfo_x86 *c)
 	case 0x63a: /* Ivybridge */
 		tlb_flushall_shift = 1;
 		break;
+	case 0x63e: /* Ivybridge EP */
+		tlb_flushall_shift = 2;
+		break;
 	default:
 		tlb_flushall_shift = 6;
 	}
-- 
1.7.12

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