Re: [RFC 10/10] irqchip: Make versatile fpga irq driver a generic chip

From: Linus Walleij
Date: Sat Jun 15 2013 - 17:22:42 EST

On Sat, Jun 15, 2013 at 11:19 PM, Linus Walleij
<linus.walleij@xxxxxxxxxx> wrote:
> On Mon, Jun 10, 2013 at 12:50 PM, Grant Likely <grant.likely@xxxxxxxxxx> wrote:
>> On Mon, Jun 10, 2013 at 8:40 AM, Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:
>>> On Mon, Jun 10, 2013 at 2:49 AM, Grant Likely <grant.likely@xxxxxxxxxx> wrote:
>>>> This is an RFC patch to convert the versatile FPGA irq controller driver
>>>> to use generic irq chip. It builds on the series that extends the
>>>> generic chip code to allow a linear irq domain to contain one or more
>>>> generic irq chips so that each interrupt controller doesn't need to hand
>>>> code the generic chip setup.
>>>> I've written this as a proof of concept to see if the new generic irq
>>>> code does what it needs to. I had to extend it slightly to properly
>>>> handle the valid mask used by the versatile FPGA driver.
>>>> Tested on QEMU, but not on real hardware.
>>> Is this the same as the one I tested previously?
>>> If it need re-testing please push a branch and I'll take it
>>> for a spin.
>> Yes, it's the same, but if you can test the branch I would appreciate
>> it. I've done some heavy rework on the irqdomain code that makes
>> everything simpler, but also makes it likely that I've broken
>> something.
>> git:// irqdomain/test
> It still works like a charm on the Integrator/AP.
> Tested-by: Linus Walleij <linus.walleij@xxxxxxxxxx>

BTW here is the new hwirq output in /proc/interrupts and it's really nice:

root@integrator:/proc cat interrupts
17: 1845 pic 1 uart-pl010
22: 13716 pic 6 timer
24: 0 pic 8 rtc-pl030
Err: 0

Linus Walleij
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