Re: [ 052/100] drm/i915: Increase the RC6p threshold.

From: Ben Hutchings
Date: Sun Mar 17 2013 - 21:11:38 EST


On Tue, 2013-03-12 at 15:31 -0700, Greg Kroah-Hartman wrote:
> 3.8-stable review patch. If anyone has any objections, please let me know.
>
> ------------------
>
> From: StÃphane Marchesin <marcheu@xxxxxxxxxxxx>
>
> commit 0920a48719f1ceefc909387a64f97563848c7854 upstream.
>
> This increases GEN6_RC6p_THRESHOLD from 100000 to 150000. For some
> reason this avoids the gen6_gt_check_fifodbg.isra warnings and
> associated GPU lockups, which makes my ivy bridge machine stable.
>
> Signed-off-by: StÃphane Marchesin <marcheu@xxxxxxxxxxxx>
> Acked-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>
> Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2572,7 +2572,7 @@ static void gen6_enable_rps(struct drm_d
> I915_WRITE(GEN6_RC_SLEEP, 0);
> I915_WRITE(GEN6_RC1e_THRESHOLD, 1000);
> I915_WRITE(GEN6_RC6_THRESHOLD, 50000);
> - I915_WRITE(GEN6_RC6p_THRESHOLD, 100000);
> + I915_WRITE(GEN6_RC6p_THRESHOLD, 150000);
> I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
>
> /* Check if we are enabling RC6 */

Is there any reason why this shouldn't be applied to 3.2.y and 3.4.y?
The same function and writes are present, only in intel_display.c rather
than intel_pm.c.

Ben.

--
Ben Hutchings
Never attribute to conspiracy what can adequately be explained by stupidity.

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