Re: [PATCH V2] clk: tegra: initialise parent of uart clocks

From: Laxman Dewangan
Date: Wed Feb 13 2013 - 02:08:07 EST

On Tuesday 12 February 2013 11:16 PM, Stephen Warren wrote:
On 02/12/2013 08:17 AM, Laxman Dewangan wrote:
Initialise the parent of UARTs to PLLP and disabling clock by
This patch wasn't tested, was it? Without the patch I just sent titled
"ARM: tegra: remove clock-frequency properties from serial nodes", the
UART clocks get turned off and the console breaks.

I tested this in next-20130212 where "clock-frequency" is there in tegra30.dtsi file.
If you remove this from dts file at all then it will not work as there is no execution path to call the clk_prepare_enable().

of_serial.c file:
if (of_property_read_u32(np, "clock-frequency", &clk)) {

/* Get clk rate through clk driver if present */
info->clk = clk_get(&ofdev->dev, NULL);
if (IS_ERR(info->clk)) {
"clk or clock-frequency not defined\n");
return PTR_ERR(info->clk);

clk = clk_get_rate(info->clk);
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