Re: [tip:x86/cpu] x86, AMD: Enable WC+ memory type on family 10 processors

From: H. Peter Anvin
Date: Tue Feb 12 2013 - 19:22:42 EST

On 02/12/2013 04:16 PM, Borislav Petkov wrote:

This family check is redundant, we're already in a 0x10 if-branch
above. Boris had sent a second version which doesn't have that check: but I don't know how this
other version has gotten in.

@hpa: maybe replace - patch is still at the top of tip:x86/cpu?

I'll check with Ingo if that is doable.

+ rdmsrl(MSR_AMD64_BU_CFG2, value);
+ value &= ~(1ULL << 24);
+ wrmsrl(MSR_AMD64_BU_CFG2, value);
+ }

rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);

However, the more serious issue is that that same kernel #GPs when
booted in kvm. It seems it cannot stomach that specific MSR, see the
second "<-- trapping instruction" below and that BU_CFG2 MSR landing in
%ecx in the line before that.

Oh, and this happens only with the kvm executable (/usr/bin/kvm) in
debian testing. If I use qemu from git, it passes over init_amd just


It #GPs on an MSR, which tends to be a bug in the VMM; RDMSR/WRMSR generally kick out to the VMM. There isn't a huge lot of work we can do about that...

I think Qemu defaults to ignoring unknown-to-it MSRs whereas maybe kvmtool croaks? Pekka?


H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.

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