[tip:x86/mce] x86, mce: Fix MSR_IA32_MCI_CTL2 CMCI threshold setup

From: tip-bot for Huang Ying
Date: Fri Jun 11 2010 - 02:04:25 EST

Commit-ID: 3c417588603e5411f29d22a40f3b5ff71529a4f0
Gitweb: http://git.kernel.org/tip/3c417588603e5411f29d22a40f3b5ff71529a4f0
Author: Huang Ying <ying.huang@xxxxxxxxx>
AuthorDate: Tue, 8 Jun 2010 14:09:10 +0800
Committer: H. Peter Anvin <hpa@xxxxxxxxx>
CommitDate: Thu, 10 Jun 2010 21:27:36 -0700

x86, mce: Fix MSR_IA32_MCI_CTL2 CMCI threshold setup

It is reported that CMCI is not raised when number of corrected error
reaches preset threshold. After inspection, it is found that
MSR_IA32_MCI_CTL2 threshold field is not setup properly. This patch
fixed it.

Value of MCI_CTL2_CMCI_THRESHOLD_MASK is fixed according to x86_64
Software Developer's Manual too.

Reported-by: Shaohui Zheng <shaohui.zheng@xxxxxxxxx>
Signed-off-by: Huang Ying <ying.huang@xxxxxxxxx>
LKML-Reference: <1275977350.3444.660.camel@xxxxxxxxxxxxxxxxxxxxxxx>
Reviewed-by: Hidetoshi Seto <seto.hidetoshi@xxxxxxxxxxxxxx>
Signed-off-by: H. Peter Anvin <hpa@xxxxxxxxx>
arch/x86/include/asm/mce.h | 2 +-
arch/x86/kernel/cpu/mcheck/mce_intel.c | 1 +
2 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 82db1d8..c62c13c 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -40,7 +40,7 @@

/* CTL2 register defines */
#define MCI_CTL2_CMCI_EN (1ULL << 30)

#define MCJ_CTX_MASK 3
#define MCJ_CTX(flags) ((flags) & MCJ_CTX_MASK)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index faf7b29..6fcd093 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -102,6 +102,7 @@ static void cmci_discover(int banks, int boot)

wrmsrl(MSR_IA32_MCx_CTL2(i), val);
rdmsrl(MSR_IA32_MCx_CTL2(i), val);
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