[patch 1/4] x86,perf: P4 PMU -- do a real check for ESCR address being in hash

From: Cyrill Gorcunov
Date: Tue May 18 2010 - 17:26:49 EST


To prevent from clashes in future code modifications do a real
check for ESCR address being in hash. At moment the callers
are known to pass sane values but better to be on a safe side.

And comment fix.

Signed-off-by: Cyrill Gorcunov <gorcunov@xxxxxxxxxx>
CC: Lin Ming <ming.m.lin@xxxxxxxxx>
CC: Peter Zijlstra <a.p.zijlstra@xxxxxxxxx>
CC: Ingo Molnar <mingo@xxxxxxx>
CC: Frederic Weisbecker <fweisbec@xxxxxxxxx>
---
arch/x86/kernel/cpu/perf_event_p4.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

Index: linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
=====================================================================
--- linux-2.6.git.orig/arch/x86/kernel/cpu/perf_event_p4.c
+++ linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
@@ -670,7 +670,7 @@ static void p4_pmu_swap_config_ts(struct

/*
* ESCR address hashing is tricky, ESCRs are not sequential
- * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03e0) and
+ * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03a0) and
* the metric between any ESCRs is laid in range [0xa0,0xe1]
*
* so we make ~70% filled hashtable
@@ -735,8 +735,9 @@ static int p4_get_escr_idx(unsigned int
{
unsigned int idx = P4_ESCR_MSR_IDX(addr);

- if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE ||
- !p4_escr_table[idx])) {
+ if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE ||
+ !p4_escr_table[idx] ||
+ p4_escr_table[idx] != addr)) {
WARN_ONCE(1, "P4 PMU: Wrong address passed: %x\n", addr);
return -1;
}

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