Re: [PATCH C 07/13] OMAP3 clock: recalculate DPLL subtree after bypass entry/exit

From: Russell King - ARM Linux
Date: Thu Jan 29 2009 - 05:33:21 EST

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On Wed, Jan 28, 2009 at 12:08:29PM -0700, Paul Walmsley wrote:
> The DPLL's rate changes when it enters or leaves bypass, so the DPLL's
> rate and the rates of all dependent clocks need to be recalculated
> when this happens.
>
> Also, fix test for bypass to test against the appropriate bypass clock,
> rather than the parent clock (which is not the bypass clock for DPLL1
> and DPLL2).

Surely this is a bug fix to the previous patch?
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Next message: Russell King - ARM Linux: "Re: [PATCH C 08/13] OMAP3 clock: put DPLL into bypass if bypass rate = clk->rate, not hardware rate"
Previous message: Peter Zijlstra: "Re: [Bugme-new] [Bug 12562] New: High overhead while switching orsynchronizing threads on different cores"
In reply to: Paul Walmsley: "[PATCH C 07/13] OMAP3 clock: recalculate DPLL subtree after bypassentry/exit"
Next in thread: Paul Walmsley: "[PATCH C 08/13] OMAP3 clock: put DPLL into bypass if bypass rate =clk->rate, not hardware rate"
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