[PATCH 0/3] x86: cleanup primary motherboard chip port access delays

[David P. Reed]

cleanup motherboard chip io port delays.  inb_p and outb_p have traditionally
used a write to port 80 (a non-existent port) as a delay.  Though there is an
argument that that is a good delay for devices on the ISA or PCI expansion buses
it is not a good mechanism for devices in the processor chipset or on the
"motherboard".  The write to port 80 at best causes an abort on the ISA or LPC
bus, and on some machines (like many of the HP laptops manufactured by Quanta)
actually writes data to real i/o devices.  For example, the ENE Embedded
Controller chip family defaults to provide a register at port 80 that 
can be written, and which can cause an interrupt in the Embedded Controller.

This has been shown to cause hangs on some machines, especially in accessing
the CMOS RTC during bootup.

This patch series addresses three of the places where these are used in common
kernel code - in particular the three uses that affect the HP laptops mentioned
above, modifying the delays to match the worst known delay issues for the
specific chips.

The patch set is complementary to the iodelay= kernel parameter added in 2.6.25,
since it means fewer users will need to add that parameter to run linux "out of the box" without hanging.

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