Re: [PATCH] trim memory not covered by WB MTRRs

From: Andi Kleen
Date: Tue Jun 26 2007 - 13:38:30 EST


On Tue, Jun 26, 2007 at 10:06:41AM -0600, Eric W. Biederman wrote:
> Andi Kleen <andi@xxxxxxxxxxxxxx> writes:
>
> >> For the K7 and K8 cores AMD systems are exactly like Intel systems
> >> with respect to MTRRs (although AMD systems also have additional registers)
> >> For the K9 core (i.e. AMD socket F or the K8 with DDR2 support) there
> >
> > It's called K8RevE, not K9
>
> revF not revE. I think AMD was code-naming that K9 before the socket F
> part was released.

I didn't think so.

>
> revE was the last DDR rev of the K8 core.

RevE had a new memory remapping scheme (memory hoisting) at least, which
I think you refered to earlier. There might have been more changes in F.

-Andi
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