Re: [PATCH] x86/PAE: Fix pte_clear for the >4GB RAM case

[Andi Kleen]

On Friday 28 April 2006 08:27, Chris Wright wrote:
> * Andi Kleen (ak@xxxxxxx) wrote:
> > On Friday 28 April 2006 07:23, Chris Wright wrote:
> > > * Andi Kleen (ak@xxxxxxx) wrote:
> > > > > +static inline void pmd_clear(pmd_t *pmd)
> > > > > +{
> > > > > +	u32 *tmp = (u32 *)pmd;
> > > > > +	*tmp = 0;
> > > > > +	smp_wmb();
> > > > > +	*(tmp + 1) = 0;
> > > > > +}
> > > > 
> > > > I think that's still wrong - it should be wmb() not smp_wmb because this
> > > > problem can happen on a UP kernel already.
> > > 
> > > I thought the barrier is to keep compiler from reordering not processor.
> > 
> > Yes, but with smp_wmb() it will go away on UP. And even on UP the
> > CPU is free to speculate.
> 
> I must be confused.  Doesn't that become a barrier() on UP?

No it was me who was confused sorry. Somehow i thought it was defined
away for !SMP

(which would make sense because why would you want a compile barrier
for a barrier that is only needed on SMP?) 

-Andi
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