problem with cache flush routine for G5?

[Chris Friesen]

We're running into issues with the "flush_data_cache" routine on the G5.

For the G5, the L1 dcache is 32K and the L2 cache is 512K. At 128 
bytes/cacheline, that's 256 and 4096 cachelines, respectively.

In the existing tree, NUM_CACHE_LINES is set to 128*8, or 1024.  Is this 
an oversight or am I missing something?

Also, I'm curious why the dcbf instruction is not used for this.

Chris

--
Chris Friesen                    | MailStop: 043/33/F10
Nortel Networks                  | work: (613) 765-0557
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