Re: [BK PATCHES] 2.6.x libata update

[Martin Schlemmer]

On Sat, 2004-02-14 at 22:32, Jeff Garzik wrote:
> Martin Schlemmer wrote:
> > Yep, it still breaks it.  I get a dma timeout on heavy disk access,
> > and then things start to freeze (or do not start at all).  Seems
> > Jon is hitting the same issue with -bk4.
> 
> Thanks for re-verifying.  The buggy patch is now reverted upstream, and 
> I'll be looking into another way to fix the "too many interrupts on 
> ICH5" problem.
> 

Stupid question - its not maybe fixed in later revisions of the
controller (also those this breaks)?  I never had the heavy interrupts
problem some seems to have ...

--
 # cat /proc/interrupts
           CPU0       CPU1
  0:   64547502   64536877    IO-APIC-edge  timer
  2:          0          0          XT-PIC  cascade
  8:       6702        945    IO-APIC-edge  rtc
  9:          0          0   IO-APIC-level  acpi
 14:        244        142    IO-APIC-edge  ide0
 15:         35         62    IO-APIC-edge  ide1
169:    1287568    1399519   IO-APIC-level  libata, uhci_hcd, eth0
177:     746886     747222   IO-APIC-level  Intel ICH5
185:    5637855    5624744   IO-APIC-level  uhci_hcd, uhci_hcd, nvidia
193:          0          0   IO-APIC-level  uhci_hcd
201:          0          0   IO-APIC-level  ehci_hcd
NMI:          0          0
LOC:  129049693  129049832
ERR:          0
MIS:          0
--

(yes, with the patch it happens without nvidia as well)

--
  Bus  0, device  31, function  1:
    IDE interface: Intel Corp. 82801EB Ultra ATA Storage Controller (rev 2).
      IRQ 169.
      I/O at 0xfc00 [0xfc0f].
      Non-prefetchable 32 bit memory at 0x40000000 [0x400003ff].
  Bus  0, device  31, function  2:
    IDE interface: Intel Corp. 82801EB Ultra ATA Storage Controller (rev 2).
      IRQ 169.
      I/O at 0xefe0 [0xefe7].
      I/O at 0xefac [0xefaf].
      I/O at 0xefa0 [0xefa7].
      I/O at 0xefa8 [0xefab].
      I/O at 0xef90 [0xef9f].
--


-- 
Martin Schlemmer

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