RE: SiI3112: problemes with shared interrupt line?

[Allen Martin]

> Just about every bug report I have about SI3112 now is on Nforce
> chipsets. At the moment however I don't know what the magic connection
> is.
> 

There are two issues I know about:

1) Earlier versions of the Asus BIOS would program incorrect timing in the
nForce internal P2P bridge, causing failures with SI3112 under high disk
activity.  This is fixed in rev 1005 of their BIOS or later.

2) PCI interrupts getting put into edge triggered mode when ACPI/APIC are
enabled.  Andrew de Quincey said this should be fixed in 2.4.22, but I
haven't tested it myself (I have ACPI disabled on all my test systems).  I
did verify his patch on 2.6 when he first posted it, and it works.

-Allen
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