Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this

[Jamie Lokier]

Pavel Machek wrote:
> Perhaps weak ordering matters when you are writting to the MMIO, too?

Perhaps, but the code in arch/i386/kernel/cpu/centaur.c seems to try
hard to set weak ordering for RAM, not the whole address space.

-- Jamie
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