Hi Alan.
>>>> Use HZ/2 instead. GCC doesn't optimize floating point constants
>>>> to the same degree it does integers, because it doesn't know what
>>>> mode (rounding, precision) the FPU is in.
>>> Isn't (HZ >> 1) better?
>> Same thing. GCC knows that division by a power of 2 is just a shift.
> Only for unsigned
When I did the "Assembler Language Maths Logic" module for my degree,
we learned that processors used SRL (Shift Right Logical) to divide
unsigned numbers by powers of 2, and SRA (Shift Right Arithmetic) to
divide signed numbers by powers of 2. Can't GCC handle that?
Best wishes from Riley.
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