From: "David S. Miller" <davem@redhat.com>
Date: Tue, 11 Jun 2002 00:36:25 -0700 (PDT)
The DMA_ALIGN attribute doesn't work, on some systems the PCI
cacheline size is determined at boot time not compile time.
Another note, it could be per-PCI controller what this cacheline size
is. We'll need to pass in a pdev to the alignment interfaces to
do this correctly.
So none of this can be done at compile time folks.
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