> recently upgrading one of my two CPUs, I found kernel-2.4.2 to be
> unable to handle the situation with 2 different CPUs (AMP =3D
> Assymmetric multiprocessing ;-) correctly. Some details on my system:
> Dual BX board (DFI P2XBL/D), iPII 350 (Deschutes) + iPIII 850
> (Coppermine) Note: The difference in features is the XMM (SSE) flag.
> The problems are twofold (a) Determination of the correct common
> features (=3D: COMCAP), i.e.
> boot_cpu_data.x86_capaility[0] at the correct time (b) TSC stuff
I have similar problems. I've got a reconfigurable non-APIC 8 way system with
(currently) 4 p5-66 and 4 p5-166 processors. I found the answer to (b) was
simply to disable the TSC stuff---my processors aren't even guaranteed to be
fed from the same clock, so there's no hope for TSC coherency.
I run into your problem (a) when trying a mixture of 486 and 586 processors.
The simplest work around I find is just to make sure that the boot CPU has the
lowest capability set (i.e. boot off a 486). Could you just swap the order of
your processors to achieve the same effect?
James Bottomley
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This archive was generated by hypermail 2b29 : Fri Mar 23 2001 - 21:00:16 EST