Re: /proc/pci and cpuinfo

From: David Weinehall (tao@acc.umu.se)
Date: Mon Feb 12 2001 - 22:25:21 EST


On Mon, Feb 12, 2001 at 06:49:13PM -0800, xcp wrote:
> I have a machine here with a discrepency on the pci information
> in /proc/pci:
> us 0, device 20, function 0:
> Ethernet controller: 3Com Unknown device (rev 48).
> Vendor id=10b7. Device id=7646.
> Medium devsel. IRQ 12. Master Capable. Latency=32. Min
> Gnt=10.Max Lat=10.
> I/O at 0xe400 [0xe401].
> Non-prefetchable 32 bit memory at 0xdf000000 [0xdf000000].
>
> from lspci:
> 00:14.0 Ethernet controller: 3Com Corporation 3cSOHO100-TX Hurricane (rev
> 30)
>
> clearly /proc/pci is wrong!

Exactly where? bus 0, device 20, function 0 == hex(00:14.0)
Revision 48 = hex(30)

And both says that it's an Ethernet controller from 3Com. The fact that
the PCI-ID database in v2.2.18 isn't quite as extensive as the one in
lspci isn't something that makes your system malfunction...

> kernel is 2.2.18 on a P3-450 256mb.
>
> Also, where does Linux detect and document the L2 or L1 cache size on a
> socket7 system? On the pentium3 its in cpuinfo as cache_size, no such
> value exists on my P120 system.

That's probably because there is no simple way to query the processor for
this information. I'll let Peter Anvin answer this one, however.

/David Weinehall
  _ _
 // David Weinehall <tao@acc.umu.se> /> Northern lights wander \\
// Project MCA Linux hacker // Dance across the winter sky //
\> http://www.acc.umu.se/~tao/ </ Full colour fire </
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This archive was generated by hypermail 2b29 : Thu Feb 15 2001 - 21:00:20 EST