Re: [PATCH] via82cxxx.c update

From: Andre Hedrick (andre@linux-ide.org)
Date: Sat Jun 03 2000 - 00:46:45 EST


On Fri, 2 Jun 2000, Bartlomiej Zolnierkiewicz wrote:

>
> This "simple & stupid" patch:
> - adds recognition of newest VIA chipset (Apollo PM133)

(VERY BAD)
You did not follow the model........
1:1 table entry regardless of dupilcation (for now)

> - fixes recognition of AMD Irongate

It worked jsut fine??

> - adds & fixes some VIA's pci ids

DGD.........

> - removes duplicate via82cxxx_table

(VERY BAD)
No table three is there because there are differnet modes.
Three and Four are paired based on the detection pdiag-pclid

There will be additions to these tables and they will vary.....NDA!

> - removes whitespaces :)

Cosmetic

> It's against 2.4.0-test1-ac7.
>
> --
> Bartlomiej Zolnierkiewicz <bkz>
>
> diff -u linux.240t1ac7/drivers/ide/via82cxxx.c linux/drivers/ide/via82cxxx.c
> --- linux.240t1ac7/drivers/ide/via82cxxx.c Fri Jun 2 01:48:56 2000
> +++ linux/drivers/ide/via82cxxx.c Fri Jun 2 21:58:43 2000
> @@ -20,7 +20,7 @@
> * given channel, one can for instance always reach ATAPI drives through
> * it, or, if one channel is unused, configuration defaults to
> * an even split FIFO levels.
> - *
> + *
> * This feature is available only through a kernel command line :
> * "splitfifo=Chan,Thr0,Thr1" or "splitfifo=Chan".
> * where: Chan =1,2,3 or 4 and Thrx = 1,2,3,or 4.
> @@ -114,7 +114,7 @@
> static struct chipset_bus_clock_list_entry * via82cxxx_table = NULL;
>
> struct chipset_bus_clock_list_entry via82cxxx_type_one [] = {
> - /* speed */ /* 25 */ /* 33 */ /* 37.5 */ /* 41.5 */
> + /* speed */ /* 25 */ /* 33 */ /* 37.5 */ /* 41.5 */
> #ifdef CONFIG_BLK_DEV_IDEDMA
> { XFER_UDMA_4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
> { XFER_UDMA_3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
> @@ -158,27 +158,6 @@
> struct chipset_bus_clock_list_entry via82cxxx_type_three [] = {
> /* speed */ /* 25 */ /* 33 */ /* 37.5 */ /* 41.5 */
> #ifdef CONFIG_BLK_DEV_IDEDMA
> - { XFER_UDMA_4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
> - { XFER_UDMA_3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
> - { XFER_UDMA_2, 0xE0, 0x20, 0xE0, 0x20, 0xE1, 0x31, 0xE1, 0x32 },
> - { XFER_UDMA_1, 0xE1, 0x20, 0xE1, 0x20, 0xE2, 0x31, 0xE2, 0x32 },
> - { XFER_UDMA_0, 0xE2, 0x20, 0xE2, 0x20, 0xE2, 0x31, 0xE2, 0x32 },
> -
> - { XFER_MW_DMA_2, 0x03, 0x20, 0x03, 0x20, 0x03, 0x31, 0x03, 0x32 },
> - { XFER_MW_DMA_1, 0x03, 0x31, 0x03, 0x31, 0x03, 0x42, 0x03, 0x53 },
> - { XFER_MW_DMA_0, 0x03, 0x31, 0x03, 0x31, 0x03, 0x42, 0x03, 0x53 },
> -#endif /* CONFIG_BLK_DEV_IDEDMA */
> - { XFER_PIO_4, 0x03, 0x20, 0x03, 0x20, 0x03, 0x31, 0x03, 0x32 },
> - { XFER_PIO_3, 0x03, 0x31, 0x03, 0x31, 0x03, 0x42, 0x03, 0x53 },
> - { XFER_PIO_2, 0x03, 0x65, 0x03, 0x65, 0x03, 0x87, 0x03, 0xA8 },
> - { XFER_PIO_1, 0x03, 0x65, 0x03, 0x65, 0x03, 0x87, 0x03, 0xA8 },
> - { XFER_PIO_0, 0x03, 0xA8, 0x03, 0xA8, 0x03, 0xDB, 0x03, 0xFE },
> - { 0, 0x03, 0xA8, 0x03, 0xA8, 0x03, 0xDB, 0x03, 0xFE }
> -};
> -
> -struct chipset_bus_clock_list_entry via82cxxx_type_four [] = {
> - /* speed */ /* 25 */ /* 33 */ /* 37.5 */ /* 41.5 */
> -#ifdef CONFIG_BLK_DEV_IDEDMA
> { XFER_UDMA_4, 0x00, 0x00, 0xE0, 0x20, 0xE1, 0x31, 0x00, 0x00 },
> { XFER_UDMA_3, 0x00, 0x00, 0xE1, 0x20, 0xE2, 0x31, 0x00, 0x00 },
> { XFER_UDMA_2, 0x00, 0x00, 0xE2, 0x20, 0xE4, 0x31, 0x00, 0x00 },
> @@ -210,10 +189,11 @@
> { "VT 82C680 Apollo P6", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C680, },
> { "VT 82C691 Apollo Pro", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C691, },
> { "VT 82C693 Apollo Pro Plus", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C693, },
> - { "Apollo MVP4", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8501_0, },
> - { "VT 8371", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8371_0, },
> - { "VT 8601", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0, },
> - { "AMD IronGate", PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_7006, },
> + { "VT 8501 Apollo MVP4", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8501_0, },
> + { "VT 8371 KX133", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8371_0, },
> + { "VT 8601 Apollo ProMedia", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0, },
> + { "VT 8605 Apollo PM133", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8605_0, },
> + { "AMD-751 Irongate", PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_7006, },
> };
>
> #define NUM_APOLLO_ISA_CHIP_DEVICES 2
> @@ -238,6 +218,7 @@
> { PCI_DEVICE_ID_VIA_8501_0, PCI_DEVICE_ID_VIA_82C686, VIA_FLAG_ATA_66, via82cxxx_type_two },
> { PCI_DEVICE_ID_VIA_8371_0, PCI_DEVICE_ID_VIA_82C686, VIA_FLAG_ATA_66, via82cxxx_type_two },
> { PCI_DEVICE_ID_VIA_8601_0, PCI_DEVICE_ID_VIA_8231, VIA_FLAG_ATA_66, via82cxxx_type_two },
> + { PCI_DEVICE_ID_VIA_8605_0, PCI_DEVICE_ID_VIA_8231, VIA_FLAG_ATA_66, via82cxxx_type_two },
> { PCI_DEVICE_ID_AMD_FE_GATE_7006, PCI_DEVICE_ID_VIA_82C686, VIA_FLAG_ATA_66, via82cxxx_type_two },
> };
>
> @@ -272,8 +253,8 @@
> int rc;
> unsigned int time;
> byte tm;
> - char *p = buf;
> -
> + char *p = buf;
> +
> /* Drive Timing Control */
> rc = pci_read_config_dword(dev, 0x48, &time);
> p += sprintf(p, "Act Pls Width: %02d %02d %02d %02d\n",
> @@ -286,7 +267,7 @@
> ((time & 0x0f0000)>>16) + 1,
> ((time & 0x0f00)>>8) + 1,
> (time & 0x0f) + 1 );
> -
> +
> /* Address Setup Time */
> rc = pci_read_config_byte(dev, 0x4C, &tm);
> p += sprintf(p, "Add. Setup T.: %01dT %01dT %01dT %01dT\n",
> @@ -294,7 +275,7 @@
> ((tm & 0x30)>>4) + 1,
> ((tm & 0x0c)>>2) + 1,
> (tm & 0x03) + 1 );
> -
> +
> /* UltraDMA33 Extended Timing Control */
> rc = pci_read_config_dword(dev, 0x50, &time);
> p += sprintf(p, "------------------UDMA-Timing-Control------------------------\n");
> @@ -318,17 +299,17 @@
> ((time & 0x030000)>>16) + 2,
> ((time & 0x0300)>>8) + 2,
> (time & 0x03) + 2 );
> -
> +
> return (char *)p;
> }
>
> static char * print_apollo_ide_config (char *buf, struct pci_dev *dev)
> {
> - byte time, tmp;
> + byte time, tmp;
> unsigned short size0, size1;
> int rc;
> - char *p = buf;
> -
> + char *p = buf;
> +
> rc = pci_read_config_byte(dev, 0x41, &time);
> p += sprintf(p, "Prefetch Buffer : %s %s\n",
> (time & 128) ? "on " : "off",
> @@ -336,7 +317,7 @@
> p += sprintf(p, "Post Write Buffer: %s %s\n",
> (time & 64) ? "on " : "off",
> (time & 16) ? "on " : "off" );
> -
> +
> /* FIFO configuration */
> rc = pci_read_config_byte(dev, 0x43, &time);
> tmp = ((time & 0x20)>>2) + ((time & 0x40)>>3);
> @@ -346,7 +327,7 @@
> p += sprintf(p, "Threshold Prim. : %s %s\n",
> FIFO_str[tmp],
> FIFO_str[time & 0x03] );
> -
> +
> /* chipset Control3 */
> rc = pci_read_config_byte(dev, 0x46, &time);
> p += sprintf(p, "Read DMA FIFO flush: %s %s\n",
> @@ -358,7 +339,7 @@
> p += sprintf(p, "Max DRDY Pulse Width: %s %s\n",
> control3_str[(time & 0x03)],
> (time & 0x03) ? "PCI clocks" : "" );
> -
> +
> /* Primary and Secondary sector sizes */
> rc = pci_read_config_word(dev, 0x60, &size0);
> rc = pci_read_config_word(dev, 0x68, &size1);
> @@ -373,10 +354,10 @@
> {
> byte t;
> int rc;
> - char *p = buf;
> + char *p = buf;
> unsigned short c;
> - byte l, l_max;
> -
> + byte l, l_max;
> +
> rc = pci_read_config_word(dev, 0x04, &c);
> rc = pci_read_config_byte(dev, 0x44, &t);
> rc = pci_read_config_byte(dev, 0x0d, &l);
> @@ -396,12 +377,12 @@
>
> return (char *)p;
> }
> -
> +
> static char * print_apollo_chipset_control2 (char *buf, struct pci_dev *dev)
> {
> byte t;
> int rc;
> - char *p = buf;
> + char *p = buf;
> rc = pci_read_config_byte(dev, 0x45, &t);
> p += sprintf(p, "Interrupt Steering Swap: %s\n",
> (t & 64) ? "on ":"off" );
> @@ -418,19 +399,19 @@
> */
> unsigned int bibma;
> int rc;
> - byte c0, c1;
> - char *p = buf;
> -
> + byte c0, c1;
> + char *p = buf;
> +
> rc = pci_read_config_dword(dev, 0x20, &bibma);
> bibma = (bibma & 0xfff0) ;
> -
> +
> /*
> * at that point bibma+0x2 et bibma+0xa are byte registers
> * to investigate:
> */
> c0 = inb((unsigned short)bibma + 0x02);
> c1 = inb((unsigned short)bibma + 0x0a);
> -
> +
> if (n == 0) {
> /*p = sprintf(p,"--------------------Primary IDE------------Secondary IDE-----");*/
> p += sprintf(p, "both channels togth: %s %s\n",
> @@ -444,7 +425,7 @@
> (c1&0x20) ? "yes" : "no ",
> (c1&0x40) ? "yes" : "no " );
> }
> -
> +
> return (char *)p;
> }
>
> @@ -471,7 +452,7 @@
> p += sprintf(p, "--------------drive0------drive1-------drive0------drive1----\n");
> p = print_apollo_chipset_control3(p, bmide_dev, 1);
> p = print_apollo_drive_config(p, bmide_dev);
> -
> +
> return p-buffer; /* hoping it is less than 4K... */
> }
>
> @@ -549,8 +530,8 @@
> /*
> * Sets VIA 82cxxx FIFO configuration:
> * This chipsets gets a splitable fifo. This can be driven either by command
> - * line option (eg "splitfifo=2,2,3" which asks this driver to switch all the
> - * 16 fifo levels to the second drive, and give it a threshold of 3 for (u)dma
> + * line option (eg "splitfifo=2,2,3" which asks this driver to switch all the
> + * 16 fifo levels to the second drive, and give it a threshold of 3 for (U)DMA
> * triggering.
> */
>
> @@ -563,7 +544,7 @@
> /* read port configuration */
> if (pci_read_config_dword(dev, 0x40, &timings))
> return 1;
> -
> +
> /* first read actual fifo config: */
> if (pci_read_config_byte(dev, 0x43, &fifo))
> return 1;
> @@ -576,7 +557,7 @@
> newfifo |= fifoconfig & 0x6f;
> } else {
> /* If ever just one channel is unused, allocate all fifo levels to it
> - * and give it a 3/4 threshold for (u)dma transfers.
> + * and give it a 3/4 threshold for (U)DMA transfers.
> * Otherwise, share it evenly between channels:
> */
> if ((timings & 3) == 2) {
> @@ -678,10 +659,10 @@
> return -1;
> }
>
> - if ((via82cxxx_table == via82cxxx_type_four) &&
> + if ((via82cxxx_table == via82cxxx_type_three) &&
> (!(hwif->udma_four)) &&
> (speed <= XFER_UDMA_2)) {
> - temp_table = via82cxxx_type_three;
> + temp_table = via82cxxx_type_two;
> } else {
> temp_table = via82cxxx_table;
> }
> @@ -871,7 +852,7 @@
> byte revision = 0;
>
> for (i = 0; i < arraysize (ApolloHostChipInfo) && !host_dev; i++) {
> - host = pci_find_device (PCI_VENDOR_ID_VIA,
> + host = pci_find_device (ApolloHostChipInfo[i].vendor_id,
> ApolloHostChipInfo[i].host_id,
> NULL);
> if (!host)
> @@ -909,8 +890,8 @@
> pci_read_config_byte(dev, 0x52, &ata66_0);
> if ((ata66_0 & 0x04) || (ata66_1 & 0x04)) {
> via82cxxx_table = (bus_speed == 33 || bus_speed == 37) ?
> - via82cxxx_type_four :
> - via82cxxx_type_three;
> + via82cxxx_type_three :
> + via82cxxx_type_two;
> }
> }
>
> diff -u linux.240t1ac7/drivers/pci/pci.ids linux/drivers/pci/pci.ids
> --- linux.240t1ac7/drivers/pci/pci.ids Fri Jun 2 01:49:01 2000
> +++ linux/drivers/pci/pci.ids Fri Jun 2 22:03:33 2000
> @@ -1905,12 +1905,13 @@
> 1458 0596 VT82C596/A/B PCI to ISA Bridge
> 0597 VT82C597 [Apollo VP3]
> 0598 VT82C598 [Apollo MVP3]
> - 0601 VT8601
> + 0601 VT8601 [Apollo ProMedia]
> + 0605 VT8605 [Apollo PM133]
> 0680 VT82C680 [Apollo P6]
> 0686 VT82C686 [Apollo Super]
> 1106 0000 VT82C686/A PCI to ISA Bridge
> 1106 0686 VT82C686/A PCI to ISA Bridge
> - 0691 VT82C691 [Apollo PRO]
> + 0691 VT82C691 [Apollo Pro]
> 1458 0691 VT82C691 Apollo Pro System Controller
> 0693 VT82C693 [Apollo Pro Plus]
> 0926 VT82C926 [Amazon]
> @@ -1926,20 +1927,23 @@
> 1106 0100 VT86C100A Fast Ethernet Adapter
> 1186 1400 DFE-530TX
> 3044 OHCI Compliant IEEE 1394 Host Controller
> + 3050 VT82C596 [Apollo Pro ACPI]
> + 3051 VT82C596 [Apollo Pro ACPI]
> 3057 VT82C686 [Apollo Super ACPI]
> 3058 VT82C686 [Apollo Super AC97/Audio]
> 1462 3091 MS-6309 Onboard Audio
> 3068 VT82C686 [Apollo Super AC97/Modem]
> - 5030 VT82C596 ACPI [Apollo PRO]
> + 5030 VT82C596 [Apollo Pro ACPI]
> 6100 VT85C100A [Rhine II]
> 8231 VT8231 [PCI-to-ISA Bridge]
> 8391 VT8371 [PCI-PCI Bridge]
> - 8501 VT8501
> - 8596 VT82C596 [Apollo PRO AGP]
> + 8501 VT8501 [PCI-AGP Bridge]
> + 8596 VT82C596 [Apollo Pro AGP]
> 8597 VT82C597 [Apollo VP3 AGP]
> 8598 VT82C598 [Apollo MVP3 AGP]
> 8601 VT8601
> - 8691 VT82C691 [Apollo Pro]
> + 8691 VT82C691 [PCI-PCI Bridge]
> + 8698 VT82C693A [PCI-PCI Bridge]
> 1107 Stratus Computers
> 0576 VIA VT82C570MV [Apollo] (Wrong vendor ID!)
> 1108 Proteon, Inc.
> diff -u linux.240t1ac7/include/linux/pci_ids.h linux/include/linux/pci_ids.h
> --- linux.240t1ac7/include/linux/pci_ids.h Fri Jun 2 01:49:22 2000
> +++ linux/include/linux/pci_ids.h Fri Jun 2 22:07:51 2000
> @@ -680,6 +680,7 @@
> #define PCI_DEVICE_ID_VIA_8371_0 0x0391
> #define PCI_DEVICE_ID_VIA_8501_0 0x0501
> #define PCI_DEVICE_ID_VIA_8601_0 0x0601
> +#define PCI_DEVICE_ID_VIA_8605_0 0x0605
> #define PCI_DEVICE_ID_VIA_82C505 0x0505
> #define PCI_DEVICE_ID_VIA_82C561 0x0561
> #define PCI_DEVICE_ID_VIA_82C586_1 0x0571
>
>
> -
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>

Andre Hedrick
The Linux ATA/IDE guy

-
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