In include/asm-i386/pgtable.h, __flush_tlb() does not flush TLB entries for
Global Pages.
According to Intel Manual 24319201.pdf (S/W Vol 3) Section 3.7, pg 3-27,
there are only
2 ways to invalidate a global page:
- use the INVLPG instruction with the address of the specific
translation, or
- first turn off the PGE flag in CR4, then (re)write CR3, then restore
CR4.
This may be intentional for some uses of __flush_tlb(), but there are
several places where
Linux attempts to flush TLB entries for global pages, such as in the smp
boot code.
A __flush_tlb() macro that actually flushes TLB entries for global pages
might look like:
#define __flush_tlb() \
do { __asm__ __volatile__( "movl %%cr4,%%eax\n\t" /* CR4 into EAX
*/ \
"movl %%eax,%%ecx\n\t" /* save orig
CR4 to ECX */ \
"andl $0xffffff7f,%%eax\n\t" /* turn off PGE
(CR4[7]) in EAX */ \
"movl %%eax,%%cr4\n\t" /* EAX into CR4
*/ \
"movl %%cr3,%%ebx\n\t" /* CR3 into EBX
*/ \
"movl %%ebx,%%cr3\n\t" /* EBX back
into CR3 */ \
"movl %%ecx,%%cr4\n\t" /* Restore orig
CR4 from ECX */ \
: /* no inputs
*/ \
: /* no outputs
*/ \
: "cc", /* clobbered
condition codes */ \
"eax", "ebx", "ecx", /* clobbered
regs */ \
"memory" /* clobbered
memory */ \
);
\
} while (0)
Mark Giampapa
Parallel Systems
IBM TJ Watson Research Center
1-914-945-3133
giampapa@us.ibm.com
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