Re: DRAM thermal throttling by 440BX chipset

Daniel J Blueman (daniel.j.blueman@stud.umist.ac.uk)
Sat, 20 Nov 1999 16:44:59 -0000

I was reading about DRAM throttling a while ago from the i440BX chipset
datasheet, but I couldn't understand why it is implemented, on the basis the
added complexity monitoring memory-bus activity, etc surely wouldn't
outweigh the benefit(s) it brings (DIMMs / chipset chips running a bit
cooler?).

I know that on my Abit BX-based BP6, the (north-bridge) memory/bus
controller chip gets quite hot due to my setup. Hmmm....in the LX and
previous server chipsets, this kind of feature wouldn't have been
implemented, and with the recent injection of good-value SMP motherboards,
this would explain why this recent issue has appeared.

In the Intel docs, it states that *system* throttling is used to reduce the
host clock (-> processor, host, memory, AGP and PCI bus clock, since they're
syncronous with the host clock). It also mentions thermal throttling, when
engaged start toggling the host-bus clock generator with the STPCLK#
(pause-clock?) signal and ZZ signal (idle/sleep?) with a period of 244us and
a programmable duty cycle. This simulates reducing the clock frequency,
reducing thermal output, power consumption, etc.

As far as I understand, this only comes into action when the system is in
some power-saving mode though.
Try turning off all ACPI and APM stuff in the (latest) BIOS. I get the
occasional APIC rouge interrupt or whatever.

Off-topic:
Does anyone know what settings are optimal for PCI write-combining and PCI
passive-release
(obvious latency vs bandwidth vs service issues here).
I assume both set to on is best, for less latency at the expense of a bit of
bandwidth (from overheads, etc).

i440BX overview at:
http://developer.intel.com/design/intarch/techinfo/440bx/index.htm

register list at:
http://developer.intel.com/design/intarch/techinfo/440bx/HostPCI.htm

information about power managment, etc:
http://developer.intel.com/design/intarch/techinfo/440bx/pwrclock.htm

Cheers,
Dan

System: Abit BP6 w/ dual iCeleron 366's o/c to 561. 128MB memory, 3dfx
Voodoo 3. Linux.
__________________________
Daniel J Blueman
Undergraduate - BSc Computing Science
UMIST university - Manchester
Direct line: 0161 933 3569
Mobile: 07775 583766
Email: daniel.j.blueman@stud.umist.ac.uk
SMS: daniel.j.blueman@sms.genie.co.uk

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