Didn't Linus proclaim a feature freeze for 2.3.x/2.4x?
Besides, I really need to implement lazy reprogramming of the performance
counter control registers first. My initial design assumed that
using WRMSR to initialize a performance counter or control register
wasn't going to be too expensive. Unfortunately, it is; it takes
about 231 cycles on a 500MHz K7 and 115 cycles on a 450MHz Pentium III.
Once this is done I'll submit it to Linus.
/ Mikael
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