enabling local APIC on non-SMP machines for performance counter

Anatoly Akkerman (akkerman@cs.nyu.edu)
Thu, 21 Oct 1999 21:11:56 -0400 (EDT)


Hi!

In August of this year there has been a post about using APIC interrupts
for handling performance counter overflows. But the thread died quickly
and I could not get any response from the people involved in it.

I know that performance counter support in Linux is being worked on by
different people but was unable to find any info on enabling support for
handling performance counter overflows.

According to Intel Manuals, by enabling a particular bit (actually bit 20)
in the P6 PerfEvtSel register, the overflow of the given 40-bit
performance counter would cause a local APIC interrupt. The manual
continues:

Begin qoute:

"To use this option, the operating system should do the following things
on the processor for which performance events are required to be
monitored:
* Provide an interrupt vector for handling the counter-overflow
interrupt
* Initialize the APIC PERF local vector entry to enable handling
of performance counter overflow events.
* Provide an entry in the IDT that points to a stub exception
handle that return without executing any instructions.
* Provide an event monitor driver that provides the actual
interrupt handler and modifies the reserved IDT entry to point to its
interrupt routine"

End Qoute.

As far as I could understand the code in arch/i386/kernel/smp.c in the
2.2.x series, as soon as the MP table is not found in the BIOS (like on a
normal non-SMP machine), the kernel, even though compiled for SMP,
disables SMP mode of the kernel and local APIC is disabled.

The kernel has support for knowing about and handling 240 interrupts but
if only 16 are enabled from the XT-PIC. How do I enable local APIC
interrupts to see counter overflows and how do I service those interrupts?

I believe, Intel was able to do all the necessary things in their very
neat tool called VTune4.0 available for Windows95/98/NT platform. Ability
to do this kind of stuff gives you interesting capabilities for profiling
and tuning.

I would greatly appreciate any information about this.

Sincerely,

Anatoly Akkerman.

PhD student at CS Dept. of NYU

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