Or in other words, on some systems special barrier instructions are
required to enforce readl/writel ordering at the bus level.
I know. What I mean is that in the following code, the compiler can put
`foo[1]=1' anywhere perfectly safely as long as it retains the ordering
of the writel() calls, and type aliasing allows this to be expressed.
writel(devaddr1, 2);
foo[1]=1;
writel(devaddr2, 3);
... but only if we don't define writel() to imply a memory barrier for
non-I/O bus accesses.
I think writel() and readl() should be serialised among themselves (and
other I/O primitives) at the bus level for the reasons already given by
others.
But there's no reason for readl/writel to serialise ordinary data
structure accesses. Where data structures require serialisation
(e.g. inter-CPU / interrupt) it's going to have to be explicit in the
code anyway (usually just a semaphore, spinlock or mb()), and may well
use different serialisation instructions or compiler constraints.
-- Jamie
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