Uniform Multi-Platform E-IDE driver Revision: 6.20
AEC6210: IDE controller on PCI bus 00 dev a0
AEC6210: not 100% native mode: will probe irqs later
AEC6210: ROM enabled at 0xfebf8000
ide0: BM-DMA at 0xef90-0xef97, BIOS settings: hda:pio, hdb:pio
ide1: BM-DMA at 0xef98-0xef9f, BIOS settings: hdc:pio, hdd:pio
HPT366: IDE controller on PCI bus 00 dev 99
HPT366: not 100% native mode: will probe irqs later
HPT366: reg5ah=0x03 ATA-33 Cable Port1
ide2: BM-DMA at 0xec00-0xec07, BIOS settings: hde:pio, hdf:pio
HPT366: IDE controller on PCI bus 00 dev 98
HPT366: not 100% native mode: will probe irqs later
HPT366: reg5ah=0x01 ATA-66 Cable Port0
ide3: BM-DMA at 0xe800-0xe807, BIOS settings: hdg:pio, hdh:pio
PIIX3: IDE controller on PCI bus 00 dev 39
PIIX3: not 100% native mode: will probe irqs later
ide4: BM-DMA at 0xffa0-0xffa7, BIOS settings: hdi:pio, hdj:pio
ide5: BM-DMA at 0xffa8-0xffaf, BIOS settings: hdk:pio, hdl:pio
**********************************
Long caution list :: THIS IS A SINGLE PCI CARD.......
This is a single chipset with a double pci function, with one per channel.
00:13.0 Class 0180: 1103:0004 (rev 01) IDE 1
00:13.1 Class 0180: 1103:0004 (rev 01) IDE 2
These appears to be a possible hardware raid in the future, speculation on
my part. This is based on the fact that secondary channel on both
functions are not connected. If you call "pci=reverse" you will need to
crack your cased and physically changed the connects for each hwif.
Normal PCI scanning:
markings reality
00:13.0 Class 0180: 1103:0004 (rev 01) IDE 1 IDE 1
00:13.1 Class 0180: 1103:0004 (rev 01) IDE 2 IDE 2
Reverse PCI scanning:
markings reality
00:13.0 Class 0180: 1103:0004 (rev 01) IDE 1 IDE 2
00:13.1 Class 0180: 1103:0004 (rev 01) IDE 2 IDE 1
HPT366: IDE controller on PCI bus 00 dev 99
HPT366: reg5ah=0x03 ATA-33 Cable Port1
ide2: BM-DMA at 0xec00-0xec07, BIOS settings: hde:pio, hdf:pio
HPT366: IDE controller on PCI bus 00 dev 98
HPT366: reg5ah=0x01 ATA-66 Cable Port0
ide3: BM-DMA at 0xe800-0xe807, BIOS settings: hdg:pio, hdh:pio
Examine above Port0 == primary channel, Port1 == secondary channel.
I called pci=reverse to boot the AEC6210 card.
Until I can figure out what kind of workaround for a pci-quirk with
Martin, I do not have an answer for the device pair inversion based on the
the pci-scan order.
The chipset will auto tun itself correctly.
*** WARNING FOR ""HDPARM"" JUNKIES ***
Do not DICK/SCREW with any settings that "HDPARM" can change!!!!!
YOU WILL CRASH YOUR SYSTEM
*** WARNING FOR ""HDPARM"" JUNKIES ***
The only thing that you are allowed to change is `-d' settings.
That is DMA on/off. If you think about unmasking, speed, bit-xfer, etc...
DON'T DO IT. I will not listen or answer your problems if you blow of
this warning..........
Andre Hedrick
The Linux IDE guy
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