> On Tue, 30 Mar 1999, Ingo Molnar wrote:
>
> >mb() does locked instructions:
> >
> >#define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
>
> mb() infact won't serialize the instruction fetch part of the cpu. So
why do you worry about instruction prefetch? cache misses and busmaster
DMA makes timings quite random anyway. The only thing we really want is
that rdtsc should not be reordered by the compiler (ie. delta time should
not be negative), which is already fixed in 2.2.5.
> adding a lock; addl $0,0(%%esp) _before_ rdtsc won't avoid the CPU to read
> the rdtsc instruction before the addl is complted and adding it _after_
> the rdtsc won't avoid the cpu to start fetching new instruction before
> rdtsc is completed. So if somebody want to have a really perfect
> get_cycles() he has to use a _serializing_ instruction like cpuid around
> rdtsc.
locked memory operations _are_ serializing instructions (spinlocks would
not work otherwise ...), they just dont serialize with page table walking
and instruction prefetches. (which is only a problem for self-modifying
code, the only place in the kernel that uses self-modifying code executes
a serializing iret and jumps before executing modified code, plus invlpg
serializes page table walks)
Btw, all current Intel CPUs (including PIII) serialize the prefetch queue
with locked instructions. I doubt this rule will be broken by future IA32
CPUs, and the IA64 will have (has) explicit ordering instructions anyway.
Using CPUID as 'lightweight' serialization is an ill idea anyway, it
destroys 4 out of 7 usable registers!
-- mingo
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