Because its non portable.
> On the other hand - WHY one loses portability doing IO memory access on
> different architectures? Sure enough that PCI memory would be present on
> any architecture that has that PCI plugged in, and registers would be the
> same (though ordering might differ, and that is the responsibility of
> writel() etc. to handle it.
Does the bus reverse the bytes in the long words, does it do PCI posting,
how is I/O space mapped - memory, I/O instructions, are different size
or endian mappings present at different offsets.
Then you can add write posting, cache coherency and the like.
Alan
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/