Timers in SMP

Hugo Varotto (hvarotto@cs.pitt.edu)
Thu, 18 Feb 1999 13:10:14 -0500


Hi to all,

I'm looking at the scheduling routines in sched.c in the kernel 2.2.1,
and I have some questions regarding the timer. My understanding is that
every 10 ms a timer interrupt comes and the kernel checks if it needs
to do a context switch or not.

So, assuming an SMP machine and an x86 architecture, my two questions
are

- which CPU is interrupted by the timer ? Is it always the same ? If
not, where should I look to the mechanism of CPU selection ?

- if we wish the interrupted CPU to preempt some of the other CPUs, is
this possible ? I understand there are some kind of interrupt mechanism
between CPUs.

Thanks in advance

Hugo

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