parport_pc patch (was Re: parport and pre8)

Tim Waugh (tim@cyberelk.demon.co.uk)
Thu, 21 Jan 1999 22:02:48 +0000 (GMT)


On Thu, 21 Jan 1999 mario.mikocevic@sk.tel.hr wrote:

> Well, pre9 or final works, modules are loading fine but
> only SPP mode works, any other mode set in BIOS, file is
> spooled but no printing occurs.

What actually goes wrong in the other modes, by the way? If parport_pc
isn't loading, you might want to give this patch a try:

--- linux/drivers/misc/parport_pc.c~ Sun Jan 3 13:34:30 1999
+++ linux/drivers/misc/parport_pc.c Thu Jan 21 21:56:37 1999
@@ -345,6 +345,8 @@
*/
static int parport_SPP_supported(struct parport *pb)
{
+ unsigned char d;
+
/*
* first clear an eventually pending EPP timeout
* I (sailer@ife.ee.ethz.ch) have an SMSC chipset
@@ -356,10 +358,16 @@
/* Do a simple read-write test to make sure the port exists. */
parport_pc_write_control(pb, 0xc);
parport_pc_write_data(pb, 0xaa);
- if (parport_pc_read_data(pb) != 0xaa) return 0;
+ if ((d = parport_pc_read_data(pb)) != 0xaa) {
+ printk (KERN_ERR "parport_pc: Wrote AA, got %2X\n", d);
+ return 0;
+ }

parport_pc_write_data(pb, 0x55);
- if (parport_pc_read_data(pb) != 0x55) return 0;
+ if ((d = parport_pc_read_data(pb)) != 0x55) {
+ printk (KERN_ERR "parport_pc: Wrote 55, got %2X\n", d);
+ return 0;
+ }

return PARPORT_MODE_PCSPP;
}
@@ -378,34 +386,35 @@
*/
static int parport_ECR_present(struct parport *pb)
{
- unsigned char r, octr = parport_pc_read_control(pb);
- unsigned char oecr = parport_pc_read_econtrol(pb);
- unsigned char tmp;
+ unsigned char r;

+ parport_pc_write_control (pb, 0xc);
r = parport_pc_read_control(pb);
if ((parport_pc_read_econtrol(pb) & 0x3) == (r & 0x3)) {
parport_pc_write_control(pb, r ^ 0x2 ); /* Toggle bit 1 */

r = parport_pc_read_control(pb);
- if ((parport_pc_read_econtrol(pb) & 0x2) == (r & 0x2)) {
- parport_pc_write_control(pb, octr);
- return 0; /* Sure that no ECR register exists */
- }
+ if ((parport_pc_read_econtrol(pb) & 0x2) == (r & 0x2))
+ goto no_reg; /* Sure that no ECR register exists */
}

if ((parport_pc_read_econtrol(pb) & 0x3 ) != 0x1)
- return 0;
+ goto no_reg;

parport_pc_write_econtrol(pb, 0x34);
- tmp = parport_pc_read_econtrol(pb);
+ if (parport_pc_read_econtrol(pb) != 0x35)
+ goto no_reg;

- parport_pc_write_econtrol(pb, oecr);
- parport_pc_write_control(pb, octr);
-
- if (tmp != 0x35)
- return 0;
+ parport_pc_write_control(pb, 0xc);

+ /* Go to mode 000; SPP, reset FIFO */
+ parport_pc_frob_econtrol (pb, 0xe0, 0x00);
+
return PARPORT_MODE_PCECR;
+
+ no_reg:
+ parport_pc_write_control (pb, 0xc);
+ return 0;
}

static int parport_ECP_supported(struct parport *pb)
@@ -706,14 +715,12 @@

static int probe_one_port(unsigned long int base, int irq, int dma)
{
- struct parport tmpport, *p;
+ unsigned int modes = 0;
+ struct parport tmpport, *p = &tmpport;
int probedirq = PARPORT_IRQ_NONE;
if (check_region(base, 3)) return 0;
tmpport.base = base;
tmpport.ops = &parport_pc_ops;
- if (!(parport_SPP_supported(&tmpport))) return 0;
- if (!(p = parport_register_port(base, irq, dma, &parport_pc_ops))) return 0;
- p->modes = PARPORT_MODE_PCSPP | parport_PS2_supported(p);
if (p->base != 0x3bc) {
if (!check_region(base+0x400,3)) {
p->modes |= parport_ECR_present(p);
@@ -725,6 +732,12 @@
p->modes |= parport_ECPEPP_supported(p);
}
}
+ p->modes |= parport_SPP_supported(p);
+ p->modes |= parport_PS2_supported(p);
+ modes = p->modes;
+ if (!(p = parport_register_port(base, irq, dma, &parport_pc_ops)))
+ return 0;
+ p->modes = modes;
p->size = (p->modes & (PARPORT_MODE_PCEPP
| PARPORT_MODE_PCECPEPP))?8:3;
printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);

Tim.
*/

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