Well, I've read that place again, and can't see that. There is a
place where manual says:
"DATAERR Interrupt Status bits are set then the respective even
occurs, and cleared ... at the beginning of the next process i.e.
at the next ^START"
Then, where the register is described (that contains statuses) it
does not say anything about clearing them by reading or anything.
Of course I can wire that signal to 067 GIRQ1 input and THAT one
has the quality you are talking about.
>
>Something like 10us. (it was 17 us on my '486.)
That's plenty enough to see if my interrupts are serviced at 60Hz rate.
Actually to measure interrupt latency on my system. So, if I
call gettimeofday from within the Interrupt handler it would give me
true time, i.e. would not be preempted by anything?
>
Thank you for your advice,
Vassili.
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