Question: Mapping non-prefetchable memory in odd-ball BIOS

Millar, Jeffrey R (jeffrey.r.millar@lmco.com)
Wed, 04 Nov 1998 20:16:39 -0500


What's the best way to deal with a BIOS that assigns PCI addresses that
differ from the kernel's assumptions? The i386 io.h and page.h files appear
to make a hard coded assumptions about the location of non-prefetchable
memory.

But, we have a Ziatech CompactPCI single board computer that makes different
assumptions. Ziatech says they put non-prefetchable memory just above 1GB
while prefetchable grows downward from from the bottom of on-board flash
located at the top of the 32 bit address space.

The Ziatech board puts non-prefetchable memory including ethernet, SCSI, and
our special frame buffer device at 0x40000000 and up. But all the other
Linux systems we looked at put non-prefetchable devices at 0xFxxxxxx.

We need to load the PCI bus address of our custom frame buffer device into
the video DMA engine of a BT-848 video decoder. But we ran into trouble
with page.h...

#define __va(x) ((void *) (unsigned long) (x) +PAGE_OFFSET

and io.h

#define __io_phys(x) ((unsigned long) (x) & ~PAGE_OFFSET

because they OR and MASK the high bits of the address. The kernel's
asm_i386/page.h defines PAGE_OFFSET 0xC0000000

The problem comes when we go to program the frame buffer address via BTTV.
We had to modify the code to not muck around with the high bits. Right now
the code explicitly tests for certain address ranges and programs the BT848
accordingly. But that doesn't make it work if another weird BIOS shows up.

What's the right way to solve this problem?

jeff

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