Re: 4MB pages and framebuffer access, x11perf results, 2.1.125

Andrea Arcangeli (andrea@e-mind.com)
Thu, 29 Oct 1998 09:57:04 +0100 (CET)


On Wed, 28 Oct 1998, MOLNAR Ingo wrote:

>+ pgd_val(*pgd) = _PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED
>+ | _PAGE_DIRTY | _PAGE_USER | _PAGE_4M
>+ | _PAGE_GLOBAL | offset;

Is really right to set the global flag? I understand that such flag cause
the entry to remain in the TLB all the time also for other processes... Do
I understood right the meaning of such flag?

--- this what I read in intel docs ---
Global (G) flag, bit 8 (Introduced in the Pentium Pro processor.)
Indicates a global page when set. When a page is marked global and the
page global enable (PGE) flag in register CR4 is set, the page-table or
page-directory entry for the page is not invalidated in the TLB when
register CR3 is loaded or a task switch occurs. This flag is provided to
prevent frequently used pages (such as pages that contain kernel or other
operating system or executive code) from being flushed from the TLB. Only
software can set or clear this flag. For page-directory entries that point
to page tables, this flag is ignored and the global characteristics of a
page are set in the page-table entries. See Section 3.7., "Translation
Lookaside Buffers (TLBs)", for more information about the use of this
flag. (This bit is reserved in Pentium and earlier Intel Architecture
processors.) Reserved
--- this what I read in intel docs ---

Andrea Arcangeli

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