Note that Linux probably _will_ support access to the high physical memory
as a buffer cache or similar. It's the only reasonable use for it, and
it's the same thing NT does, for example. For once MS did a reasonable
thing - they told intel to forget about their original extremely hairy
scheme, and the new PAE36 things in the Xeon etc CPU's make it easy to
access the high memory without doing the horrible cludgy 3-level page
table thing.
(Not that three level page tables are bad - they aren't - but as done by
intel they just sucked ;)
So there might actually be interest in using 64-bit PCI on intel, but
probably only in a very limited sense: using 64-bit DMA in order to fill
and write from the upper memory region. That should be fairly transparent
from anything else - it doesn't involve remapping shared areas or anything
like that.
[ Side issue: I don't actually know how shared PCI devices show up in a
machine with 4GB of memory, so that may be a problem. It's not a problem
on non-intel machines, because on the alpha and others the PCI space is
completely separated from normal memory, so it should be ok to have
memory and PCI mapped at the same address even though it probably means
that you lose device-to-device direct transfers ]
Linus
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