Seems a flawed argument to me.
I don't know how _PC_ interrupts handle themselves, but in an industry
generic context I would have expected that we now have to return and tell
X that we handled its interrupt and would it now please stop shouting
and lower its line (it may have already done so - I don't know if it
expects an ack).
We then should look again to see if the interrupt is still asserted, and
if it is, poll to find out why. I assume the interrupt was latched
but level triggered, so that resetting the latch while Y is still
asserting a high will leave the latch set and we'll see it.
That's the scenario you set up, and it leaves us capable of detecting that
both X and Y sent a high level.
> In contrast, with level-triggered interrupts you don' thave any sharing
> problems, because the "level" is going to remain for as long as any of the
Well, your argument seems to be based more or where the latching is done
than on whether the interrupt is edge or level detected. If the interrupt
(i.e. the computer side) is latched, but the peripheral side is not,
then level triggered latches are more likely to register two close-together
events from different inputs. Quite simply, the interrupt will latch
and we will not be able to unlatch it by ackíng only one of the sources.
On the other hand, if te latch is edge triggered, then an incoming edge
from a second source will not even be seen by a set high latch,
so we can't possibly see it and treat it.
I.e., would somebody mind drawing a diagram? I need to know where the RC
flipflops are, and where the JK flipflops are, in order to comment sensibly.
My impression is that "it depends".
>
Peter ptb@it.uc3m.es
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