PCI: Discovered primary peer bus xx (how I was able to boot)

peloy@ven.ra.rockwell.com
Mon, 3 Aug 1998 10:18:51 -0400 (VET)


Hi,

I was able to make 2.1.112 to boot on my machine after I reverted the
patch from Martin (I guess) that is below.

Since the problem is related to PCI, here are my PCI options (that
have worked fine in the past, e.g. < 2.1.111):

CONFIG_PCI=y
CONFIG_PCI_BIOS=y
# CONFIG_PCI_DIRECT is not set
# CONFIG_PCI_QUIRKS is not set
# CONFIG_PCI_OLD_PROC is not set

Kernel messages related to PCI are:

PCI: BIOS32 Service Directory structure at 0xc00f93d0
PCI: BIOS32 Service Directory entry at 0xf0000
PCI: BIOS probe returned s=00 hw=02 ver=02.00 l=00
PCI: PCI BIOS revision 2.00 entry at 0xf0100
PCI: Probing PCI hardware
PCI: Scanning for ghost devices on bus 0
PCI: Host bridge at 00
PCI: Sorting device list...

This is an old Digital PC with a FPU-buggy Pentium 66. NCR-53C810 on
the motherboard.

It looks like it is working fine now.

Just let me know if you want me to do more testing.

Thanks,

peloy.-

--------------------------- Cut here ----------------------------
diff -u --recursive --new-file v2.1.111/linux/arch/i386/kernel/bios32.c linux/arch/i386/kernel/bios32.c
--- v2.1.111/linux/arch/i386/kernel/bios32.c Tue Jul 21 00:15:30 1998
+++ linux/arch/i386/kernel/bios32.c Mon Jul 27 11:44:56 1998
@@ -1,7 +1,7 @@
/*
* bios32.c - Low-Level PCI Access
*
- * $Id: bios32.c,v 1.40 1998/07/16 21:16:03 mj Exp $
+ * $Id: bios32.c,v 1.42 1998/07/26 09:33:07 mj Exp $
*
* Copyright 1993, 1994 Drew Eckhardt
* Visionary Computing
@@ -86,7 +86,6 @@
#include "irq.h"

#undef DEBUG
-#define DEBUG

#ifdef DEBUG
#define DBG(x...) printk(x)
@@ -914,29 +913,31 @@
* Although several sources claim that the host bridges should have
* header type 1 and be assigned a bus number as for PCI2PCI bridges,
* the reality doesn't pass this test and the bus number is usually
- * hard-wired to 1.
+ * set by BIOS to the first free value.
*/
__initfunc(void pcibios_fixup_peer_bridges(void))
{
- struct pci_dev *dev;
- int cnt = 0;
+ struct pci_bus *b = &pci_root;
+ int i;

- for(dev=pci_root.devices; dev; dev=dev->sibling)
- if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) {
- DBG("PCI: Host bridge at %02x\n", dev->devfn);
- if (cnt) {
- struct pci_bus *b = kmalloc(sizeof(struct pci_bus), GFP_KERNEL);
+ do {
+ int n = b->subordinate+1;
+ u16 l;
+ for(i=0; i<256; i += 8)
+ if (!pcibios_read_config_word(n, i, PCI_VENDOR_ID, &l) &&
+ l != 0x0000 && l != 0xffff) {
+ DBG("Found device at %02x:%02x\n", n, i);
+ printk("PCI: Discovered primary peer bus %02x\n", n);
+ b = kmalloc(sizeof(*b), GFP_KERNEL);
memset(b, 0, sizeof(*b));
- b->parent = &pci_root;
b->next = pci_root.next;
pci_root.next = b;
- b->self = dev;
- b->number = b->secondary = cnt;
+ b->number = b->secondary = n;
b->subordinate = 0xff;
b->subordinate = pci_scan_bus(b);
+ break;
}
- cnt++;
- }
+ } while (i < 256);
}

/*
--------------------------- Cut here ----------------------------

--

Eloy A. Paris Information Technology Department Rockwell Automation Venezuela Telephone: +58-2-9432311 Fax: +58-2-9431645

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