Some time ago I have been reading the specs for the EIDE interface. There
are some really scary timing constrains on this bus with distributed
termination. Those need to be satisfied even for the DMA mode, which is
the mode I'm running two of the disks at my home system. You need
therefore to program the interface chip exactly for the mode in charge.
But currently the IDE code is relaying on the fact that the BIOS will do
it nicely for Generic DMA, which is basically compleatly wrong. Most of
the BIOSes don't get it right. They just put the system in the most secure
state, which means that the timings which it will set are *very*
conservative and some kind of PIO mode. This seems to be not sufficient
for most of the DMA modes. In my home system the situation is compleatly
wired, since I'm using an very old 430HX chipset board with a 300MHz K6,
where the BF2 jumper for CPU speed was missing (I have sold it my self to
ground level) and the processor isn't detected corretly by the BIOS.
Therefore the BIOS can't detect and set the timings correctly.
Even for the IDE interface chips which are explicitly supported the
current IDE driver does silently select some (-1) slower PIO mode that the
one You specify on the command line. This had been done for support of
some genuinly buggy interface chips like for example the CMD640 but this
may be the reason for the setting missmatch between the drive and system.
In my oppinion the hdparm utility interface should be changed to reprogram
BOTH the drive and interface chip if you specify some kind of running mode
in the form of PIO-x or DMA-x to resolve those problems instead of
relaying on the fact that the user is sophisticated enought to uderstand
compleatly the problem and will od it himself by hand!
Marcin
=========================================================================
In real life: System Programmer at AIS AXON GmbH
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